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fA$At$=tQH1[A\A]A^A_]ËtD5EtI$1H/c%AD$?uL@f%Ë1LLӾ L轭RD ELLɗu"IAƅH1HX<¾L莉ljHHAHHHHE1AHHHHA@EHHHHLHHHHHHA$HHE1HHAHE1HHHHHHHHHADDHHDHHAHHHHHHHHHHH1A$A$HHHHE1AUEEDHHUUXHHHHHHHHDHHSHHAЉAHHHHHHf??1DHHDUDUAM1Em DADi=@1DH1HAD1ADD҉=DHHHHID$ PD1ED]1HAʼnfDHID$ D]PD8=D@ HDHDEEM A‰HHD]A?DUDUD]DHHAM*AU(HHHHA$E1{'KAft=AHH@HHASHHDHHHHUUMHHLDt\=ALHHAAHHHHHHHHDHHMAWAHHDHHDMDMHDfffAFDHHDMDMDHHHHDDMHHDMHHDDMHHDUDUHDDMƒfffHHDft4ftNfthAG HHHHHHAG HHDHHfu AFAFAFDHHDHHDHHDMDMDHHDMDMHHlHHTDHHDHHDMDMHHHHHHD1 HHDEDEAD1-HDDEHDEA(DEEHHD)HHQAHH`AIEHHHHHHHHA IHLDA@HHHDA|HHHDHHHHIHHHHH]HsHHHHHH1HHHHHHHHHHHHA$HHHHHHHHHHHHHHHDHKDHHKHDHI$HHHI$HHHHHHHHHHH7dib8000: %s: sub_channel_prbs_group = %d , subchannel =%d prbs = 0x%04x 7dib8000: %s: could not acquire lock 7dib8000: %s: i2c read error on %d 7dib8000: %s: Index %x, PID %d, OnOff %d 7dib8000: %s: set slave fe %p to index %i 7dib8000: %s: too many slave frontend 7dib8000: %s: using default timf 7dib8000: %s: using updated timf 7dib8000: %s: wrong Vendor ID (read=0x%x) 7dib8000: %s: wrong Device ID (%x) 7dib8000: %s: found DiB8000A 7dib8000: %s: found DiB8000B 7dib8000: %s: found DiB8000C 7dib8000: %s: found DiB8096P 7dib8000: %s: %s: not enough memory 7dib8000: %s: #%d: not identified 7dib8000: %s: IC %d initialized (to i2c_address 0x%x) 7dib8000: %s: Updated timing frequency: %d (default: %d) 7dib8000: %s: powermode : 774 : %x ; 775 : %x; 776 : %x ; 900 : %x; 1280 : %x 7dib8000: %s: Enable Mpeg mux 7dib8000: %s: SET DEM OUT OLD INTERF ON HOST BUS 7dib8000: %s: SET DIBSTREAM TX ON HOST BUS 7dib8000: %s: SET MPEG MUX ON HOST BUS 7dib8000: %s: clk_cfg1: 0x%04x 7dib8000: %s: ifreq: %d %x, inversion: %d 7dib8000: %s: sleep dib8096p: %d 7dib8000: %s: Updating pll (prediv: old = %d new = %d ; loopdiv : old = %d new = %d) 7dib8000: %s: Old Internal = %d 7dib8000: %s: Xtal = %d , New Fmem = %d New Fdemod = %d, New Fsampling = %d 7dib8000: %s: New Internal = %d 7dib8000: %s: Waiting for PLL to lock 7dib8000: %s: PLL Updated with prediv = %d and loopdiv = %d 7dib8000: %s: PLL: Bandwidth Change %d MHz -> %d MHz (prediv: %d->%d) 7dib8000: %s: PLL: New Setting for %d MHz Bandwidth (prediv: %d, ratio: %d) 7dib8000: %s: PLL: Update ratio (prediv: %d, ratio: %d) 7dib8000: %s: pid filter enabled %d 7dib8000: %s: gpio dir: %x: gpio val: %x 7dib8000: %s: could not start Slow ADC 7dib8000: %s: no valid AGC configuration found for band 0x%02x 7dib8000: %s: WBD: ref: %d, sel: %d, active: %d, alpha: %d 7dib8000: %s: AGC split_offset: %d 7dib8000: %s: Using list for autosearch : %d 7dib8000: %s: -I- Setting output mode for demod %p to %d 7dib8000: %s: acquisition mode activated 7dib8000: %s: Unhandled output_mode passed to be set for demod %p 7dib8000: %s: error : dib8000 MA not supported 7dib8000: %s: using standard PAD-drive-settings, please adjust settings in config-struct to be optimal. 7dib8000: %s: OUTPUT_MODE could not be reset. 7dib8000: %s: set diversity input to %i 7dib8000: %s: Next all layers stats available in %u us. 7dib8000: %s: Next layer %c stats will be available in %u us 7dib8000: %s: dib8000_get_frontend: TMCC lock 7dib8000: %s: TMCC lock on the slave%i 7dib8000: %s: dib8000_get_frontend: transmission mode 2K 7dib8000: %s: dib8000_get_frontend: transmission mode 4K 7dib8000: %s: dib8000_get_frontend: transmission mode 8K 7dib8000: %s: dib8000_get_frontend: Guard Interval = 1/32 7dib8000: %s: dib8000_get_frontend: Guard Interval = 1/16 7dib8000: %s: dib8000_get_frontend: Guard Interval = 1/8 7dib8000: %s: dib8000_get_frontend: Guard Interval = 1/4 7dib8000: %s: dib8000_get_frontend: partial_reception = %d 7dib8000: %s: dib8000_get_frontend: Layer %d segments = %d 7dib8000: %s: dib8000_get_frontend: Layer %d time_intlv = %d 7dib8000: %s: dib8000_get_frontend: Layer %d Code Rate = 1/2 7dib8000: %s: dib8000_get_frontend: Layer %d Code Rate = 2/3 7dib8000: %s: dib8000_get_frontend: Layer %d Code Rate = 3/4 7dib8000: %s: dib8000_get_frontend: Layer %d Code Rate = 5/6 7dib8000: %s: dib8000_get_frontend: Layer %d Code Rate = 7/8 7dib8000: %s: dib8000_get_frontend: Layer %d DQPSK 7dib8000: %s: dib8000_get_frontend: Layer %d QPSK 7dib8000: %s: dib8000_get_frontend: Layer %d QAM16 7dib8000: %s: dib8000_get_frontend: Layer %d QAM64 7dib8000: %s: transmission mode auto 7dib8000: %s: guard interval auto 7dib8000: %s: no layer modulation specified 7dib8000: %s: layer %c has either modulation or FEC auto 7dib8000: %s: number of segments is invalid 7dib8000: %s: Tuning channel on %s search mode 7dib8000: %s: %dkhz tuner offset (frequency = %dHz & current_rf = %dHz) total_dds_offset_hz = %d 7dib8000: %s: setting a DDS frequency offset of %c%dkHz 7dib8000: %s: dib8000_autosearch_irq: max correlation result available 7dib8000: %s: dib8000_autosearch_irq failed 7dib8000: %s: dib8000_autosearch_irq succeeded 7dib8000: %s: layer%i: time interleaver = %d 7dib8000: %s: Deeper interleaver mode = %d on layer %d : timeout mult factor = %d => will use timeout = %ld 7dib8000: %s: ISDB-T layer locks: Layer A %s, Layer B %s, Layer C %s 7dib8000: %s: Not all ISDB-T layers locked in %d ms: Layer A %s, Layer B %s, Layer C %s 7dib8000: %s: Tuner ITF: write busy (overflow) 7dib8000: %s: TunerITF: read busy (overflow) 7dib8000: %s: TunerITF: read busy (empty) 7dib8000: %s: Configure DibStream Rx synchroMode = %d 7dib8000: %s: Configure DibStream Tx 7dib8000: %s: dib8096P setting output mode TS_SERIAL using Mpeg Mux 7dib8000: %s: dib8096P setting output mode TS_PARALLEL_GATED using Mpeg Mux 7dib8000: %s: dib8096P setting output mode TS_PARALLEL_CONT using Smooth block 7dib8000: %s: dib8096P setting output mode TS_FIFO using Smooth block 7dib8000: %s: dib8096P setting output mode MODE_DIVERSITY 7dib8000: %s: SET DIV_OUT ON DIBSTREAM TX 7dib8000: %s: dib8096P setting output mode MODE_ANALOG_ADC 7dib8000: %s: SET ADC_OUT ON DIBSTREAM TX 7dib8000: %s: output_mpeg2_in_188_bytes = %d 7dib8000: %s: dib8000: must at least specify frequency 7dib8000: %s: dib8000: no bandwidth specified, set to default 7dib8000: %s: %s ON : Enable diversity INPUT 7dib8000: %s: %s mode OFF : by default Enable Mpeg INPUT 7dib8000: %s: autosearch succeeded on fe%i 7dib8000: %s: Restarting frontend %d 7dib8000: %s: tuning done with status %d 7dib8000: %s: strange callback time something went wrong 7dib8000: %s: SET MPEG ON DIBSTREAM TX client.i2c_buffer_lockautomanualnot enabledlockedNOT LOCKED7dib8000: %s: init sdram 7dib8000: %s: dib8000_init &state->i2c_buffer_lockDiB8096P tuner interfacedib8000_cfg_gpiodib8000_pid_filter_ctrldib8000_update_plldib8096p_tuner_sleepdib8000_set_slave_frontenddib8000_pid_filterdib8000_read_worddib8000_reset_pll_commondib8000_reset_plldib8000_resetdib8000_wakeupdib8096p_setHostBusMuxdib8096p_cfg_DibTxdib8096p_setDibTxMuxdib8096p_configMpegMuxdib8096p_set_output_modedib8000_set_acquisition_modedib8000_set_output_modedib8000_get_init_prbsdib8000_update_timfdib8000_autosearch_irqdib8000_autosearch_startdib8000_set_bandwidth__dib8000_read_worddib8000_read32dib8000_set_ddsdib8000_set_frequency_offsetis_manual_modedib8090p_init_sdramdib8000_tunedib8000_agc_soft_splitdib8000_set_agc_configdib8000_set_power_modedib8096p_cfg_DibRxdib8096p_set_diversity_indib8000_set_diversity_indib8000_set_frontenddib8000_get_frontenddib8000_get_statsdib8096p_tuner_read_serpardib8096p_tuner_write_serpardib8000_initdib8000_i2c_write16dib8000_i2c_read16dib8000_identifydib8000_i2c_enumerationdib8000_write_wordDiBcom 8000 ISDB-T3P/3$.@*02+@B,EG^,,P@i;)g#;)# '; 3=H   RF` Lx[LG} @w[ PRF` Lxl ((((((f =< ' +bRa1i)R QPNJD=6-% T@qkT@TVcURTVK9n%YX􌗌q`uF5EukGtmk%Az/TcUe/T/I@a/IU[Pas\PLqlLsbUlsKvrdUCq4acDWq6oS%|tASObUOO*@MW*UPf͌]/S͌ Ss0u Sʳ!WhʳtWKvtW PRl MucMz@GzhrphrdVaU@V*`#]mJ*` sb@ sdebuglicense=GPLdescription=Driver for the DiBcom 8000 ISDB-T demodulatorauthor=Olivier Grenie parm=debug:turn on debugging (default: 0)parmtype=debug:intsrcversion=4F7CCF5D8390E8D450DD1A9depends=dvb-core,dibx000_commonretpoline=Yintree=Yname=dib8000vermagic=5.4.0-216-generic SMP mod_unload modversions dib8000_attachpmodule_layout:zLkmalloc_cachesmsleep6:param_ops_int37i2c_transferb˛@mutex_unlock9dstrscpyPjiffiesK2i2c_add_adapter$t"dvb_frontend_detachp7jiffies_to_msecs ӳ-mutex_lock_interruptibleQ__mutex_initprintk__usecs_to_jiffies=Ddibx000_exit_i2c_master9ydibx000_reset_i2c_mastern1ci2c_del_adapterW6dibx000_get_i2c_adapterGusleep_range) __stack_chk_fail\ɢ.__x86_indirect_thunk_raxm__fentry__Ѡ"kmem_cache_alloc_trace zkfree62sintlog10Ӹdibx000_init_i2c_master__msecs_to_jiffiesԧbJ(,@[Xnp~zws0oUHk`g!xc _[WSiOjL1 H8DEP@ h<8e?dib8000GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0dib8000.ko4d # 0=( U4 j= }J70P%p&@] 6s/iP.-\P+*r o [H0PmP=T l3p| L0 7`2QK0Zmm0 p%n!@ G<X G@R ]8} a8p 7  "1 E^@myykH , X( a4#02@GJ^{Pk=*Q@:7# Xh b mxP `  ` 0   0X     1 B@ Y0 j 0}  ` P  p   %  =  \  t &D '   '  H  0( R?4 pC PR l {   ~  " p p/ 01 , ; 1R 2c @3,| p3 `  6 3  7X" 9B Ng v ? i P p A `B   (H & FF pk pz H    :   M @N O(U'O VB\v  `ppf H-kL p0l  ( 0 #oKC%h0wrTP  :Fb*,D(R   dw-F^qx]o __UNIQUE_ID_srcversion43__UNIQUE_ID_depends42____versions__UNIQUE_ID_retpoline41__UNIQUE_ID_intree40__UNIQUE_ID_name39__UNIQUE_ID_vermagic38_note_6__ksymtab_dib8000_attach__kstrtab_dib8000_attachdib8096p_i2c_funcdib8096p_get_i2c_tunerdib8000_get_tune_statedib8000_set_tune_statedib8000_get_slave_frontenddib8000_fe_get_tune_settingsdib8000_pwm_agc_resetdib8090p_get_dc_powerdib8000_set_gpiodib8000_pid_filter_ctrldib8000_get_adc_powerdib8000_update_plldib8096p_tuner_sleepdib8000_set_slave_frontenddib8000_pid_filterdib8000_ctrl_timfdib8000_initdib8000_get_i2c_masterdib8000_i2c_enumerationdib8000_set_wbd_refdib8000_get_init_prbslut_prbs_4klut_prbs_8klut_prbs_2kdib8000_get_init_prbs.cold__func__.38788dib8000_i2c_read16dib8000_i2c_read16.cold__func__.38194__dib8000_read_word__dib8000_read_word.cold__func__.38200dib8000_write_worddib8000_write_word.cold__func__.38227dib8000_restart_agcdib8000_wait_lockdib8000_set_isdbt_loop_paramsdib8000_pid_filter.cold__func__.39451dib8000_sad_calibdib8000_releasedib8000_get_time_us.isra.0CSWTCH.376CSWTCH.377CSWTCH.378dib8000_set_slave_frontend.cold__func__.39391dib8000_set_bandwidth.isra.0dib8000_set_bandwidth.isra.0.cold__func__.38330dib8000_load_ana_fe_coefs.part.0dib8000_identifydib8000_identify.cold__func__.38392dib8000_i2c_write16dib8000_i2c_write16.cold__func__.38220__key.39411dib8000_i2c_enumeration.cold__func__.39408dib8000_read32dib8000_read32.cold__func__.38212lut_1000ln_mantdib8000_update_timfdib8000_update_timf.cold__func__.38696__func__.38206dib8000_read_unc_blocksdib8000_reset_statsdib8000_read_signal_strengthdib8000_read_berdib8000_set_power_modedib8000_set_power_mode.cold__func__.38307dib8000_set_sb_channelcoff_thres_1segcoff_thres_3segdib8000_viterbi_statedib8000_set_subchannel_prbsdib8000_set_isdbt_common_channelpermu_segCSWTCH.394CSWTCH.395adp_Qdefaultadp_Q64adc_target_16dBana_fe_coeff_3segcoeff_8k_sb_3seg_1dqpskcoeff_8k_sb_3segana_fe_coeff_1segadp_Q16coeff_8k_sb_1seg_dqpskcoeff_8k_sb_1segcoeff_2k_sb_1seg_dqpskcoeff_2k_sb_1segcoeff_4k_sb_1seg_dqpskcoeff_4k_sb_1segana_fe_coeff_13segcoeff_4k_sb_3seg_1dqpskcoeff_4k_sb_3segcoeff_2k_sb_3seg_1dqpskcoeff_2k_sb_3segcoeff_2k_sb_3seg_0dqpsk_1dqpskcoeff_2k_sb_3seg_0dqpskcoeff_4k_sb_3seg_0dqpsk_1dqpskcoeff_4k_sb_3seg_0dqpskcoeff_8k_sb_3seg_0dqpsk_1dqpskcoeff_8k_sb_3seg_0dqpskdib8096p_enMpegMuxdib8096p_configMpegMuxdib8096p_configMpegMux.cold__func__.38514dib8096p_setHostBusMuxdib8096p_setHostBusMux.cold__func__.38532dib8000_reset_plldib8000_reset_pll.cold__func__.38351__func__.38344dib8096p_tuner_sleep.cold__func__.38668dib8000_update_pll.cold__func__.38366dib8000_pid_filter_ctrl.cold__func__.39443dib8000_set_gpio.cold__func__.38379dib8000_set_adc_statedib8000_wakeupdib8000_wakeup.cold__func__.39080dib8000_get_snr.isra.0dib8000_read_snrdib8000_read_lock.isra.0dib8000_set_agc_config.part.0dib8000_set_agc_config.part.0.cold__func__.38437dib8000_agc_soft_splitdib8000_agc_soft_split.cold__func__.38447dib8000_agc_startupdib8000_autosearch_start.isra.0dib8000_autosearch_start.isra.0.cold__func__.38884dib8000_set_output_mode.isra.0dib8000_set_output_mode.isra.0.cold__func__.38263__func__.38273dib8000_sleepdib8000_resetdib8000_defaultsdib8000_reset.cold__func__.38411dib8000_set_diversity_in.isra.0dib8000_set_diversity_in.isra.0.cold__func__.38290dib8000_get_statsstrength_to_db_tableper_layer_regsdib8000_get_stats.cold__func__.39367dib8000_read_statusdib8000_get_frontenddib8000_get_frontend.cold__func__.39106dib8000_get_timeout.isra.0.constprop.0dib8000_tuneLUT_isdbt_symbol_duration__func__.39019dib8000_tune.cold__func__.38997__func__.38890__func__.38917__func__.38925__func__.38991dib8096p_tuner_xferdib8096p_tuner_xfer.cold__func__.38579__func__.38594dib8096p_cfg_DibRx.constprop.0dib8096p_cfg_DibRx.constprop.0.cold__func__.38498dib8096p_cfg_DibTx.constprop.0dib8096p_cfg_DibTx.constprop.0.cold__func__.38486__key.39462dib8000_opsdib8096p_tuner_xfer_algodib8000_init.cold__func__.39460dib8096p_set_output_mode.isra.0dib8096p_set_output_mode.isra.0.cold__func__.38561__func__.38521dib8000_set_frontenddib8000_set_frontend.cold__func__.39162__func__.38544__UNIQUE_ID_license85__UNIQUE_ID_description84__UNIQUE_ID_author83__UNIQUE_ID_debug82__UNIQUE_ID_debugtype81__param_debug__param_str_debug__msecs_to_jiffiesdibx000_init_i2c_master__this_moduleintlog10kfreekmem_cache_alloc_trace__fentry____x86_indirect_thunk_rax__stack_chk_failusleep_rangedibx000_get_i2c_adapteri2c_del_adapterdibx000_reset_i2c_masterdibx000_exit_i2c_master__usecs_to_jiffiesprintk__mutex_initmutex_lock_interruptiblejiffies_to_msecsdvb_frontend_detach__crc_dib8000_attachi2c_add_adapterstrscpymutex_unlocki2c_transferparam_ops_intmsleepkmalloc_caches1Qq  6 / P. p P -   P+ *! 0) 1  < D O PmW _  f q    0 f  2 Mb v i!n    + 3 A y X @        # ] q     & RF O ] f ql y   :  '  <  _ g t      $-D K T1L 0[ rzg  !go  AxHQM]N  A i    P  ` K h    `     "  "  # X #  #  $  $  <$ @ F$ 0 %  q%  x%  % ` % P %  % p &  &  :&  A&  &''%'''''(( (61(((i*"*N***Q+++:++^,f,"-A------).1.zQ.../q/0 11j1r11123A3q3O4W46 6!660787/778]89::J?@0@YAaAeAAaBBCC$D " E F<2F?FTFFFlG HXHhHoH HHHIIIJJJ0J J  KKK+KfKmL L L L LM!MANNNN(OJO OOTOOoO PYPPP QQRR9RR@ R S ;S mS S!T/T=TJT~ jTrT% TUU[ U UVV!V\VWW WWW3 XUYYY ZZ Z[ [[- R^Z^ 0a8a{ ab] bbE c\ ccc>e Se; {eY e e ee #e /e 6e #e /e 6f #f /f 6/fCf Jf OfYf ^f qfii ij jj kkk lll Qmmmum |mdmmTmm m yJn|n nn n n  &oro}ooppq q9gqtqQqqq rr%r4rrr!rrrrrtYtituuvvvw w@wIw~ww<yy_=yFyMyWyyyyy  ! `( x-29 `@ PHMX 0_ xdip w Pv        (#    P+ & - x5: A H MR ] g lq x  0        @ P<     xx $ P,18 ? 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( - 2 Z^9 #B I N T Y X` g l r w X~ # #  P  j    j    i 0   k    l 0 \!um( 0/ 49r@ 0G HLQ q[ 0b `gqtqx 0 8q 0 p  r 0 r  04r 0 r  Hy  * /<IwF M R_wf p uy  y P it  u  &y P  @y 0P p(08p@HPX`hp x@   p     @P (0@8@&H'P'X0(`*hP+p-xP./p/0112@3p3 6679?A`BFH M@NU V pf(k0l8Pm@oHr01Ar@N MP2@ pf    .symtab.strtab.shstrtab.note.gnu.build-id.note.Linux.rela.text.rela.text.unlikely.rela__ksymtab_gpl.rela__kcrctab_gpl.rela__mcount_loc.rodata.str1.8.rodata.str1.1.rela.rodata.modinfo__ksymtab_strings.rela__param__versions.data.gnu.linkonce.this_module.bss.comment.note.GNU-stack.gnu_debuglink@$.d?Dz:@+JzE@0^ Y@I0ql@0I P@HI 2@q2` @8P8(@pQ`  @0X-h P.Q<0 *H 01 0  `He0  *H 1o0k0F0.1,0*U #Build time autogenerated kernel keyªC Ys @!0  `He0  *H Kok]ƒwdu=z ,vLf([T?!jΕ_ ZCҧՈ|E꣌j WRdz Ήa4 'c O7ky\#/AOR/#~n e<0寃薺dwBe?JAY:7g3b(%Ujǔ&ݲ1<,%-@h&0(ceW#5b_0夅Yk{ OΪ g"=60W(Uѹ6 x 2"-8.I4NkL]sGP}?:&f#˸}3*JjM["^{5h$k"f pu jeě Іf</11%Ϻ!wR-)KmbL̷e| 4ifLw =u<=nmR _&<*.@Í߭Ol]KÛ ދXSWA6b)ֺNm~Module signature appended~