ELF>@@)(GNUKhY Ss\8LinuxUHpwC1w!1/wHswHH]Ã2]H A|HHÃr:v1]H]HHUHv N(wHHH]1]UHH@HH@xHcHFH1]fUHG`H@HH@xPx1]@UH]ff.UHAWIAVAUAATISHwLvxDMEAEtt1ɺzLLlL1[A\A]A^A_]AHHru8LzL1ɺ1[A\A]A^A_]ù@PzLFfDUHAUE1ATHwIHFxtM)1)Ћ)1)ʹ9}f)1)9~KADDL!A\A]]HcHHDD, 뺉йff.@HG(t+uBUOLCH@1H1]HXOLHPx 1UHATISHHsA$uH1[A\]HUHATSLg`!LL!ƒD1[A\]ff.fUHATSLg`Lځf%,0 u7ڃtA t/utB[A\]Ãtiutww4t u̓Lо1[A\]Á@s tf @\@TuZ UHAWIAVAUATSH(Lj`(IELH@xHELALELELE!LA5€]O)1fU1)Ƌ)؉1)9ƉHH uDLcDAfF $fDefEAG$<AG(1<fMD$ADHEȋ E1 DpxDH)߉1)DI D DA)ؙ1)9|AH6uIc}HHf}uEăfEDAAHHDDDD U fEDDG 1EDLc<D9xHHuAD]DUAfADfF DLEH]AA(E ԉfULULULALALUL!1H([A\A]A^A_]AfM A (H([A\A]A^A_]LcIuHHB LELE|HEIuAHHHxJc DEHDUD]HHigfffHH")IuADUD]IuDHH#HIuHHDDAAD$[fMA1H fUHATItt11A\]ËL1A\]1ɺL1ɺL"L1ɺL1ɺ1A\]ù1A\]ùLA!L1LAL1L1LLLDhL]It$HHff.@UHAWAVAUATSHHwLfxA$ID1E1Aىs!EEt:DAЍpGLHHt1A$sEEuDHAHuA$&DELA$LCEADŽ$H[A\A]A^A_]HHA$IuD]H)HEEIuDHH)AAA$K1A$ssQLADEHHuLEA$LCwIuAH)Hff.fUHGH@xHHx1]fUHu`%1] `%1]@UHAWAVAUIATSHHhL@IHXLLpxH{HEtAtxAHLH{HAuAttADHD[A\A]A^A_]AI$XDEHHDEDUԾhLAaDDmԾhLDEAAADEЃAYI$XHHI$XHHDEDEf.UHAWAVAUATSLH^HIFL`xwKM$E1LA9$uL[DA\A]A^A_]A$LAAUHATSHUHHH~zeH%(HE1H{HUܾyE#E܉E H{HU{DE܋MĀtDD3M@t D@D3MMjH{E1E1{HD DXHMeH3 %(uJHe[A\]HsHHMkHsHHE܋M2fUHATAS1EstHxjE1E1XHe[A\]ff.UHSHeH%(HE1stHUHxEHMeH3 %(uH[]UHATASDstE1HxjE1ZOHe[A\]UHSstE1E1HxjZH]ɅOU HAWAVAUATLg SHH eH%(HE1HLHEHwIHHHMe11HHIEH=HELHIEHMuLLIEHIE0HIEHHIE`ADžLADžI}HU1ADžÚI}HU̾ADž LHEIEHtN%HH@HEtIEHEIEHEAHEeH3%(uHeD[A\A]A^A_]HH{HH{H1H{HH{H1HLAHLALHLAHL‰HL믉HLHLUHLAI}11CIUMLHAƅpIDžIDžIEIDžIDžIDžIDž IDž0fADždIB;A`11LL…tI}HI}1E1HED PHHuHEPHEfxt2I}jE1E1lYEu HE@t HE@AHEI}~8Ƀ8jEE1E1AAM1DHI HcZADžtcI}H%qtHMHMHED EẼv I}AI}jE1E11ɺ zXI}jE1E1$I}E1E1j%I}E1E1jI}E1E1jI}E1E1H 9jI}E1E1j:I}E1E1j;I}E1E1j<I}E1E1H >jI}E1E1j?I}E1ɹjE1!HLHAHUHHH]UHH]wm8903_irqwm8903_class_w_putwm8903_seq_notifierwm8903_set_bias_levelwm8903_set_deemphwm8903_hw_paramswm8903_mic_detectwm8903wlf,wm8903H1Ju>      ZZZZZZZZ^^^^^^^^Cb   //../.! ! ( )() ) **! &2XX6KKd,XK   PB" !$%&'s( )A2* +,-.D/D2345679-:-;9<9>9?9@CEZ^bhlmnoprtuvw xz{~h(Enabling microphone detection: %x %x MCLK = %dHz, target sample rate = %dHz CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d BCLK ratio %d for %dHz - actual BCLK = %dHz Failed to read IRQ status: %d Failed to read interrupt polarity: %d Failed to allocate register map: %d Failed to request supplies: %d Failed to enable supplies: %d Device with ID %x is not a WM8903 Failed to read chip revision: %d Left Input PGA Common Mode SwitchRight Input PGA Common Mode SwitchDRC Compressor Threshold VolumeDRC Smoothing Hysteresis SwitchSet deemphasis %d (%dHz) DSP fs = %dHz Actual CLK_SYS = %dHz Enabling Class W Starting DC servo for %x Restore DC servo %d value %x Calibrate DC servo %d DC servo %d: %x 4DCS mode %d delay not set sound/soc/codecs/wm8903.cDisabling Class W Bypass use count now %d Failed to read IRQ mask: %d Write sequencer done Microphone short (pol=%x) Microphone detect (pol=%x) &wm8903->lockInvalid IRQ: %d Failed to read chip ID: %d WM8903 revision %c wm8903Failed to add GPIOs: %d Failed to request IRQ: %d wm8903-hifiCapturePlaybacksnd_soc_wm8903CLK_DSPCLK_SYSMICBIASHPL_DCSHPR_DCSLINEOUTL_DCSLINEOUTR_DCSLeft Input MuxIN1LIN2LIN3LLeft Input Inverting MuxRight Input MuxIN1RIN2RIN3RRight Input Inverting MuxLeft Input Mode MuxSingle-EndedDifferential LineDifferential MicRight Input Mode MuxLeft Input PGARight Input PGALeft ADC InputADCDMICDMICDATRight ADC InputLeft Capture MuxLeftADCLRightADCRRight Capture MuxAIFTXLAIFTXRLeft Playback MuxAIFRXLAIFRXRRight Playback MuxDACL SidetoneDACR SidetoneDACLDACRLeft Output MixerLeft Bypass SwitchRight Bypass SwitchDACL SwitchDACR SwitchRight Output MixerLeft Speaker MixerRight Speaker MixerLeft Line Output PGARight Line Output PGALeft Headphone Output PGARight Headphone Output PGALeft Speaker PGARight Speaker PGAHPL_ENAHPR_ENAHPL_ENA_DLYHPR_ENA_DLYLINEOUTL_ENALINEOUTR_ENALINEOUTL_ENA_DLYLINEOUTR_ENA_DLYDCS MasterHPL_ENA_OUTPHPR_ENA_OUTPLINEOUTL_ENA_OUTPLINEOUTR_ENA_OUTPHPL_RMV_SHORTHPR_RMV_SHORTLINEOUTL_RMV_SHORTLINEOUTR_RMV_SHORTHPOUTLHPOUTRLINEOUTLLINEOUTRLOPLONROPRONCharge PumpLeft HiFi CaptureRight HiFi CaptureLeft PlaybackRight PlaybackADC InputDACR Sidetone MuxDACL Sidetone MuxRight Inverting Input MuxLeft Inverting Input MuxLeft Input PGA SwitchLeft Input PGA VolumeRight Input PGA SwitchRight Input PGA VolumeADC OSRHPF SwitchHPF ModeDRC SwitchDRC Compressor Slope R0DRC Compressor Slope R1DRC VolumeDRC Minimum Gain VolumeDRC Maximum Gain VolumeDRC Attack RateDRC Decay RateDRC FF DelayDRC Anticlip SwitchDRC QR SwitchDRC QR Threshold VolumeDRC QR Decay RateDRC Smoothing SwitchDRC Smoothing ThresholdDRC Startup VolumeDigital Capture VolumeADC Companding ModeADC Companding SwitchDigital Sidetone VolumeDAC OSRDigital Playback VolumeDAC Soft Mute RateDAC Mute ModeDAC Mono SwitchDAC Companding ModeDAC Companding SwitchDAC Boost VolumePlayback Deemphasis SwitchHeadphone SwitchHeadphone ZC SwitchHeadphone VolumeLine Out SwitchLine Out ZC SwitchLine Out VolumeSpeaker SwitchSpeaker ZC SwitchSpeaker VolumeNoneulawalawHardSoftFast (fs/2)Slow (fs/32)LowMediumHigh0.725ms1.45ms5.8ms5 samples9 samples186ms372ms743ms1.49s2.97s5.94s11.89s23.87s47.56sinstantaneous363us762us2.9ms11.6ms23.2ms46.4ms92.8ms185.6ms11/21/41/81/160Low powerHigh performanceHi-fiVoice 1Voice 2Voice 3AVDDCPVDDDBVDDDCVDDlicense=GPLauthor=Mark Brown description=ASoC WM8903 driversrcversion=18A9384FF8C0A160ACB89F4alias=of:N*T*Cwlf,wm8903C*alias=of:N*T*Cwlf,wm8903alias=i2c:wm8903depends=snd-pcm,snd-soc-core,sndretpoline=Yintree=Yname=snd_soc_wm8903vermagic=5.4.0-216-generic SMP mod_unload modversions wm8903_mic_detectpmodule_layout6jsnd_pcm_format_widthmsleepi2c_del_driverDsnd_soc_dapm_get_volsw"Jregmap_update_bits_base__const_udelayb˛@mutex_unlocksnd_soc_component_update_bitsj[*snd_soc_put_volsw_kSregmap_readVHQsnd_soc_get_volsw-gpiochip_removekqkgpiochip_add_data_with_keyoD1devm_regulator_bulk_getregulator_bulk_enable>2)snd_soc_info_enum_doublejsnd_soc_dapm_kcontrol_dapm囝R_dev_warnQ__mutex_initprintk*mutex_lockLGsnd_soc_dapm_put_volsw=irq_get_irq_datar request_threaded_irqڶV3_dev_errϢ snd_ctl_boolean_mono_info2gpiochip_get_data1snd_soc_info_volswqi2c_register_driver-U_dev_infosnd_soc_get_enum_doubleVzregulator_bulk_disable) __stack_chk_fail__devm_regmap_init_i2cndevm_snd_soc_register_componentsnd_soc_component_writem__fentry__"__dynamic_dev_dbg*snd_soc_put_enum_double<snd_soc_jack_reportrsnd_soc_component_read32Ydevm_kmallocc}regmap_writeRNregcache_sync;JQfree_irq%e$snd_soc_dapm_put_enum_doubleDD@+.>"V]}DX w (2<Pd x ,@@D}@D}w 0@ `  w 0@ `  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